Framework para estudos de mapeamentos inteligentes de grafos de multiaplicações em arquiteturas many-core

Abstract

The increasing demand for data processing in compute-intensive applications, such as intelligent systems and streaming applications, has driven the adoption of Multi-Core and many-core architectures as an alternative to single-core systems. In this context, Network-on-Chip (NoC)-based architectures have emerged as an efficient solution for communication among multiple cores. However, the problem of task mapping in these architectures, especially in scenarios involving multiple concurrent applications, remains challenging, as it requires the simultaneous optimization of several metrics, such as energy consumption, latency, load balancing, and fault tolerance. In this context, in this work is proposed a framework for the study of task mapping in NoC-based many-core architectures, with a focus on multi-application environments. The approach integrates a multi-objective optimization module, developed in MATLAB, responsible for generating mapping solutions and analyzing the Pareto front, with a high-level NoC simulator implemented in Python, which enables the evaluation of mapping strategies through packet-level network traffic simulation. The proposed tool enables systematic design space exploration, allowing comparative analysis of different mapping strategies, visualization of performance metrics, and extraction of statistical results. Furthermore, the abstraction level adopted in the simulator supports rapid experimentation and the evaluation of complex scenarios without requiring detailed hardware-level modeling. The obtained results indicate that the proposed framework is effective in supporting multi-objective task mapping studies in many-core architectures, contributing as a flexible and accessible tool for performance analysis, education, and the development of new mapping strategies in NoC-based systems.